HP Says New Design Puts RISC System on One Chip
 
Microbytes Daily News Service
Copyright (c) 1989, McGraw-Hill, Inc.
Hewlett-Packard has developed a new microprocessor design
technology that allows the company to put its entire RISC-based
Precision Architecture on a single chip and to at least double
the performance of its minicomputers and workstations that use
the new chip, HP said today. HP engineers declined to disclose
the details of the new chip design. They promised that more
details would be forthcoming in February at the International
Solid State Circuit Conference (ISSCC) in San Francisco.
 
The few details that were disclosed indicate that the chip is
about 2 inches on a side and has close to 1 million transistors
and 400 pins. Based on 0.8-micron CMOS technology, the new chip
will require less than 10 watts of power and will offer clock
speeds greater than 48 MHz. Integer performance will reach 50 to
60 million instructions per second and floating-point performance
will hit 12 to 16 million floating-point operations per second,
HP said.
 
These performance figures put the new chip in the same class as
DEC's recently announced High Density Signal Carrier (HDSC)
technology used in the new VAX 9000 mainframe, but without the
massive cooling and power requirements of the DEC design.
However, HP vice president Willem Roelandts emphasized that the
company has "no intentions of building a mainframe" but will
concentrate on machines priced "between $12,000 and $1 million."
 
According to the head of the chip's design team, Dennis Georg,
one of the key design features of the chip is the capability to
build in different cache designs depending on whether the chip
will be used in a system requiring intensive floating-point
operations (such as engineering or scientific applications) or
whether the chip is to be used in systems more dependent on
integer computations such as commercial business systems. Georg
hinted that there would be different versions of the processor
for engineering workstations and for HP's commercial minis. Georg
also said that the single chip replaces the three or four chips
required on current Precision Architecture systems.
 
Roelandts said that the chip will first appear in HP's high-end
minicomputers and in engineering workstations within the next
12 months. The CMOS implementation will give HP a significant
price/performance advantage over the competition's "more exotic"
designs, noted Roelandts. Roelandts may have been referring to
IBM's thermal conduction module design and to DEC's HDSC
technology.
 
                              --- Nick Baran
 
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